EISA=Extended Industry Standard Architecture.
Developed by Compaq, AST, Zenith, Tandy...
+---------------------------------------------+
|            (component side)                 |
|                                             |
|___________ ISA-16bit __       ISA-8bit    __|
            |||||||||||  |||||||||||||||||||  A1(front)/B1(back)
             | | | | |    | | | | | | | | |  EISA: E1(front)/F1(back)
                   C1/D1
                  G1/H1
A,C,E,G=Component Side A,B,F,H=Sold Side
 (at the
computer)
 (at the
computer)
62+38 PIN EDGE CONNECTOR at the computer.
| Pin | Name | Description | 
|---|---|---|
| E1 | CMD# | Command Phase | 
| E2 | START# | Start Phase | 
| E3 | EXRDY | EISA Ready | 
| E4 | EX32# | EISA Slave Size 32 | 
| E5 | GND | Ground | 
| E6 | KEY | Access Key | 
| E7 | EX16# | EISA Slave Size 16 | 
| E8 | SLBURST# | Slave Burst | 
| E9 | MSBURST# | Master Burst | 
| E10 | W/R# | Write/Read | 
| E11 | GND | Ground | 
| E12 | RES | Reserved | 
| E13 | RES | Reserved | 
| E14 | RES | Reserved | 
| E15 | GND | Ground | 
| E16 | KEY | Access Key | 
| E17 | BE1# | Byte Enable 1 | 
| E18 | LA31# | Latchable Addressline 31 | 
| E19 | GND | Ground | 
| E20 | LA30# | Latchable Addressline 30 | 
| E21 | LA28# | Latchable Addressline 28 | 
| E22 | LA27# | Latchable Addressline 27 | 
| E23 | LA25# | Latchable Addressline 25 | 
| E24 | GND | Ground | 
| E25 | KEY | Access Key | 
| E26 | LA15 | Latchable Addressline 15 | 
| E27 | LA13 | Latchable Addressline 13 | 
| E28 | LA12 | Latchable Addressline 12 | 
| E29 | LA11 | Latchable Addressline 11 | 
| E30 | GND | Ground | 
| E31 | LA9 | Latchable Addressline 9 | 
| F1 | GND | Ground | 
| F2 | +5V | +5 VDC | 
| F3 | +5V | +5 VDC | 
| F4 | --- | |
| F5 | --- | |
| F6 | KEY | Access Key | 
| F7 | --- | |
| F8 | --- | |
| F9 | +12V | +12 VDC | 
| F10 | M/IO# | Memory/Input-Output | 
| F11 | LOCK# | Lock bus | 
| F12 | RES | Reserved | 
| F13 | GND | Ground | 
| F14 | RES | Reserved | 
| F15 | BE3# | Byte Enable 3 | 
| F16 | KEY | Access Key | 
| F17 | BE2# | Byte Enable 2 | 
| F18 | BE0# | Byte Enable 0 | 
| F19 | GND | Ground | 
| F20 | +5V | +5 VDC | 
| F21 | LA29# | Latchable Addressline 29 | 
| F22 | GND | Ground | 
| F23 | LA26# | Latchable Addressline 26 | 
| F24 | LA24# | Latchable Addressline 24 | 
| F25 | KEY | Access Key | 
| F26 | LA16 | Latchable Addressline 16 | 
| F27 | LA14 | Latchable Addressline 14 | 
| F28 | +5V | +5 VDC | 
| F29 | +5V | +5 VDC | 
| F30 | GND | Ground | 
| F31 | LA10 | Latchable Addressline 10 | 
| G1 | LA7 | Latchable Addressline 7 | 
| G2 | GND | Ground | 
| G3 | LA4 | Latchable Addressline 4 | 
| G4 | LA3 | Latchable Addressline 3 | 
| G5 | GND | Ground | 
| G6 | KEY | Access Key | 
| G7 | D17 | Data 17 | 
| G8 | D19 | Data 19 | 
| G9 | D20 | Data 20 | 
| G10 | D22 | Data 22 | 
| G11 | GND | Ground | 
| G12 | D25 | Data 25 | 
| G13 | D26 | Data 26 | 
| G14 | D28 | Data 28 | 
| G15 | KEY | Access Key | 
| G16 | GND | Ground | 
| G17 | D30 | Data 30 | 
| G18 | D31 | Data 31 | 
| G19 | MREQx | Master Request | 
| H1 | LA8 | Latchable Addressline 8 | 
| H2 | LA6 | Latchable Addressline 6 | 
| H3 | LA5 | Latchable Addressline 5 | 
| H4 | +5V | +5 VDC | 
| H5 | LA2 | Latchable Addressline 2 | 
| H6 | KEY | Access Key | 
| H7 | D16 | Data 16 | 
| H8 | D18 | Data 18 | 
| H9 | GND | Ground | 
| H10 | D21 | Data 21 | 
| H11 | D23 | Data 23 | 
| H12 | D24 | Data 24 | 
| H13 | GND | Ground | 
| H14 | D27 | Data 27 | 
| H15 | KEY | Access Key | 
| H16 | D29 | Data 29 | 
| H17 | +5V | +5 VDC | 
| H18 | +5V | +5 VDC | 
| H19 | MAKx | Master Acknowledge | 
| Contributor: | Joakim Ögren, Mark Sokos | 
| Source: | Mark Sokos EISA page | 
| "EISA System Architecture, 2nd Edition" by Tom Shanley and Don Anderson, ISBN 0-201-40995-X | |
| comp.sys.ibm.pc.hardware.* FAQ Part 4 - maintained by Ralph Valentino | 
  Copyright © The Hardware Book Team 1996-2004.
  May be copied and redistributed, partially or in whole, as appropriate.
  Document last modified: 2002-01-10