Available at the Commodore 128.
 (at the computer)
 (at the computer)
44 PIN FEMALE EDGE at the computer.
| Pin | Name | Description | 
|---|---|---|
| 1 | GND | System Ground | 
| 2 | +5V | System Vcc | 
| 3 | +5V | System Vcc | 
| 4 | /IRQ | Interrupt request | 
| 5 | R/W | System Read/Write Signal | 
| 6 | DClock | 8.18MHz Video Dot Clock | 
| 7 | I/O1 | I/O Chip select $de00-deff | 
| 8 | /GAME | Sensed for memory map configuration | 
| 9 | /EXROM | Sensed for memory map configuration | 
| 10 | I/O2 | I/O Chip select $df00-dfff | 
| 11 | /ROML | External ROM select $8000-Bfff | 
| 12 | BA | Bus available output | 
| 13 | /DMA | Direct memory access input | 
| 14 | D7 | Data bit 7 | 
| 15 | D6 | Data bit 6 | 
| 16 | D5 | Data bit 5 | 
| 17 | D4 | Data bit 4 | 
| 18 | D3 | Data bit 3 | 
| 19 | D2 | Data bit 2 | 
| 20 | D1 | Data bit 1 | 
| 21 | D0 | Data bit 0 | 
| 22 | GND | System Ground | 
| A | GND | System Ground | 
| B | /ROMH | External ROM Select $c000-ffff | 
| C | /RESET | System Reset Signal | 
| D | /NMI | Non-Maskable Interrupt | 
| E | 1MHz | System 1MHz clock | 
| F | TA15 | Translated address bit 15 | 
| H | TA14 | Translated address bit 14 | 
| J | TA13 | Translated address bit 13 | 
| K | TA12 | Translated address bit 12 | 
| L | TA11 | Translated address bit 11 | 
| M | TA10 | Translated address bit 10 | 
| N | TA9 | Translated address bit 9 | 
| P | TA8 | Translated address bit 8 | 
| R | SA7 | Shared address bit 7 | 
| S | SA6 | Shared address bit 6 | 
| T | SA5 | Shared address bit 5 | 
| U | SA4 | Shared address bit 4 | 
| V | SA3 | Shared address bit 3 | 
| W | SA2 | Shared address bit 2 | 
| X | SA1 | Shared address bit 1 | 
| Y | SA0 | Shared address bit 0 | 
| Z | GND | System Ground | 
| Contributor: | Rob Gill | 
| Source: | Commodore 128 Programmers reference guide | 
  Copyright © The Hardware Book Team 1996-2004.
  May be copied and redistributed, partially or in whole, as appropriate.
  Document last modified: 2002-01-10