60 PIN UNKNOWN CONNECTOR on the computer
        59     Left     1
Front ===================== Rear
        60     Right    2
| Pin | Name | Dir | Description | 1 | +8V |  | +5V 3-T regulator voltage supply (about +8V) | 2 | +8V |  | +5V 3-T regulator voltage supply (about +8V) | 3 | GND |  | Ground | 4 | READYA | System ready (10K pull-up to +5V) | 5 | GND |  | Ground | 6 | RESET* |  | System reset (active low) | 7 | GND |  | Ground | 8 | SCLK | nc | System clock (not connected) | 9 | LCP* | nc | CPU indicator 1=TI99 0=2nd generation (not connected) | 10 | AUDIO |  | Input audio (=AUDIOIN) | 11 | RDBENA* |  | Active low: enable flex cable data bus drivers (1K pull-up) | 12 | PCBEN | H | PCB enable for burn-in (always High) | 13 | HOLD* | H | Active low CPU hold request (always High) | 14 | IAQHA | nc | IAQ [or] HOLDA (logical or) | 15 | SENILA* | H | Interrupt level A sense enable (always High) | 16 | SENILB* | H | Interrupt level B sense enable (always High) | 17 | INTA* |  | Active low interrupt level A (=EXTINT*) | 18 | LOAD* | nc | Unmaskable interrupt (not connected) | 19 | D7 |  | Data bit 7 (LSB) | 20 | GND |  | Ground | 21 | D5 |  | Data bit 5 | 22 | D6 |  | Data bit 6 | 23 | D3 |  | Data bit 3 | 24 | D4 |  | Data bit 4 | 25 | D1 |  | Data bit 1 | 26 | D2 |  | Data bit 2 | 27 | GND |  | Ground | 28 | D0 |  | Data bit 0 (MSB) | 29 | A14 |  | Address bit 14 | 30 | A15 |  | Address bit 15 (LSB). Also CRU output bit. | 31 | A12 |  | Address bit 12 | 32 | A13 |  | Address bit 13 | 33 | A10 |  | Address bit 10 | 34 | A11 |  | Address bit 11 | 35 | A8 |  | Address bit 8 | 36 | A9 |  | Address bit 9 | 37 | A6 |  | Address bit 6 | 38 | A7 |  | Address bit 7 | 39 | A4 |  | Address bit 4 | 40 | A5 |  | Address bit 5 | 41 | A2 |  | Address bit 2 | 42 | A3 |  | Address bit 3 | 43 | A0 |  | Address bit 0 (MSB) | 44 | A1 |  | Address bit 1 | 45 | AMB | H | Extra address bit. Always High. | 46 | AMA | H | Extra address bit. Always High. | 47 | GND |  | Ground | 48 | AMC | H | Extra address bit. Always High. | 49 | GND |  | Ground | 50 | CLKOUT* |  | Inversion of phase 3 clock (=PHI3*) | 51 | CRUCLK* |  | Inversion of TMS9900 CRUCLOCK pin | 52 | DBIN |  | Active high = read memory | 53 | GND |  | Ground | 54 | WE* |  | Write Enable (derived from TMS9900 WE* pin) | 55 | CRUIN |  | CRU input bit to TMS9900 | 56 | MEMEN* |  | Memory access enable (active low) | 57 | -12V |  | -12 Volts 3-T regulator supply voltage (about -16V) | 58 | -12V |  | -12 Volts 3-T regulator supply voltage (about -16V) | 59 | +12V |  | +12 Volts 3-T regulator supply voltage (about +16V) | 60 | +12V |  | +12 Volts 3-T regulator supply voltage (about +16V) | 
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Direction is computer relative world.
Notes:
| Contributor: | Joakim Ögren | 
| Source: | TI-99/4A Card Slot pinout at Technick.net | 
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  May be copied and redistributed, partially or in whole, as appropriate.
  Document last modified: 2002-01-10